Assembly - shr instruction turn on carry flag?












6















I saw the next code:



shr AL, 1
jnc bit_0


I don't understand when the carry flag is turn on due to shr instrucrion?



Thanks










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  • 2





    It's testing whether AL is even or odd.

    – harold
    Mar 22 '12 at 16:04
















6















I saw the next code:



shr AL, 1
jnc bit_0


I don't understand when the carry flag is turn on due to shr instrucrion?



Thanks










share|improve this question


















  • 2





    It's testing whether AL is even or odd.

    – harold
    Mar 22 '12 at 16:04














6












6








6


2






I saw the next code:



shr AL, 1
jnc bit_0


I don't understand when the carry flag is turn on due to shr instrucrion?



Thanks










share|improve this question














I saw the next code:



shr AL, 1
jnc bit_0


I don't understand when the carry flag is turn on due to shr instrucrion?



Thanks







assembly x86






share|improve this question













share|improve this question











share|improve this question




share|improve this question










asked Mar 22 '12 at 14:13









Adam ShAdam Sh

2,573164372




2,573164372








  • 2





    It's testing whether AL is even or odd.

    – harold
    Mar 22 '12 at 16:04














  • 2





    It's testing whether AL is even or odd.

    – harold
    Mar 22 '12 at 16:04








2




2





It's testing whether AL is even or odd.

– harold
Mar 22 '12 at 16:04





It's testing whether AL is even or odd.

– harold
Mar 22 '12 at 16:04












2 Answers
2






active

oldest

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10














shr AL, 1 moves all of the bits in AL right one place.



The original rightmost bit is shifted out of the AL register into the carry flag (and the new leftmost bit is set to 0). For example:



 +------------------------+               +------------------------+
| 1 0 0 1 0 1 0 1 | | 0 1 1 0 0 1 0 0 |
+------------------------+ +------------------------+
or

+------------------------+ CF +------------------------+ CF
|(0) 1 0 0 1 0 1 0 | 1 |(0) 0 1 1 0 0 1 0 | 0
+------------------------+ +------------------------+




In your comment on another answer:




My book gives the next example: Before shift: AL = 10101110 ; shr AL, 1 ; After shift: 01011100, CF = 1 ; Is it mistake?




If that's what it says, then yes. That's a left shift (shl AL, 1), not a right shift: the bits in AL have all been moved left by one place, and the carry flag has been set to the bit that was shifted out of the left-hand end.






share|improve this answer































    0














    to add some clarifications :



    shr AL, 1 ; it will (SH)ift (R)ight (1)x the value contained in AL register, which is 8 lower bits of AX register. Hence it will divide the value contained in AL by 2.



    If AL was previously even like 0b100 (4) it will become 0b10 (2) and put 0 in the carry flag.
    Carry Flag is bit 0 in the flag register https://en.wikipedia.org/wiki/FLAGS_register



    If AL was previously an odd value like 0b101 (5) then it will become 0b10 (2) and put 1 in the flag register. Hence the carry flag will act like a remainder if you divide by 2.



    jnc bit_0 ; It will (J)ump to label 'bit_0' if (N)o (C)arry flag was set, i.e if the value was even (like 0b100 in the above example) before the shift.






    share|improve this answer

























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      2 Answers
      2






      active

      oldest

      votes








      2 Answers
      2






      active

      oldest

      votes









      active

      oldest

      votes






      active

      oldest

      votes









      10














      shr AL, 1 moves all of the bits in AL right one place.



      The original rightmost bit is shifted out of the AL register into the carry flag (and the new leftmost bit is set to 0). For example:



       +------------------------+               +------------------------+
      | 1 0 0 1 0 1 0 1 | | 0 1 1 0 0 1 0 0 |
      +------------------------+ +------------------------+
      or

      +------------------------+ CF +------------------------+ CF
      |(0) 1 0 0 1 0 1 0 | 1 |(0) 0 1 1 0 0 1 0 | 0
      +------------------------+ +------------------------+




      In your comment on another answer:




      My book gives the next example: Before shift: AL = 10101110 ; shr AL, 1 ; After shift: 01011100, CF = 1 ; Is it mistake?




      If that's what it says, then yes. That's a left shift (shl AL, 1), not a right shift: the bits in AL have all been moved left by one place, and the carry flag has been set to the bit that was shifted out of the left-hand end.






      share|improve this answer




























        10














        shr AL, 1 moves all of the bits in AL right one place.



        The original rightmost bit is shifted out of the AL register into the carry flag (and the new leftmost bit is set to 0). For example:



         +------------------------+               +------------------------+
        | 1 0 0 1 0 1 0 1 | | 0 1 1 0 0 1 0 0 |
        +------------------------+ +------------------------+
        or

        +------------------------+ CF +------------------------+ CF
        |(0) 1 0 0 1 0 1 0 | 1 |(0) 0 1 1 0 0 1 0 | 0
        +------------------------+ +------------------------+




        In your comment on another answer:




        My book gives the next example: Before shift: AL = 10101110 ; shr AL, 1 ; After shift: 01011100, CF = 1 ; Is it mistake?




        If that's what it says, then yes. That's a left shift (shl AL, 1), not a right shift: the bits in AL have all been moved left by one place, and the carry flag has been set to the bit that was shifted out of the left-hand end.






        share|improve this answer


























          10












          10








          10







          shr AL, 1 moves all of the bits in AL right one place.



          The original rightmost bit is shifted out of the AL register into the carry flag (and the new leftmost bit is set to 0). For example:



           +------------------------+               +------------------------+
          | 1 0 0 1 0 1 0 1 | | 0 1 1 0 0 1 0 0 |
          +------------------------+ +------------------------+
          or

          +------------------------+ CF +------------------------+ CF
          |(0) 1 0 0 1 0 1 0 | 1 |(0) 0 1 1 0 0 1 0 | 0
          +------------------------+ +------------------------+




          In your comment on another answer:




          My book gives the next example: Before shift: AL = 10101110 ; shr AL, 1 ; After shift: 01011100, CF = 1 ; Is it mistake?




          If that's what it says, then yes. That's a left shift (shl AL, 1), not a right shift: the bits in AL have all been moved left by one place, and the carry flag has been set to the bit that was shifted out of the left-hand end.






          share|improve this answer













          shr AL, 1 moves all of the bits in AL right one place.



          The original rightmost bit is shifted out of the AL register into the carry flag (and the new leftmost bit is set to 0). For example:



           +------------------------+               +------------------------+
          | 1 0 0 1 0 1 0 1 | | 0 1 1 0 0 1 0 0 |
          +------------------------+ +------------------------+
          or

          +------------------------+ CF +------------------------+ CF
          |(0) 1 0 0 1 0 1 0 | 1 |(0) 0 1 1 0 0 1 0 | 0
          +------------------------+ +------------------------+




          In your comment on another answer:




          My book gives the next example: Before shift: AL = 10101110 ; shr AL, 1 ; After shift: 01011100, CF = 1 ; Is it mistake?




          If that's what it says, then yes. That's a left shift (shl AL, 1), not a right shift: the bits in AL have all been moved left by one place, and the carry flag has been set to the bit that was shifted out of the left-hand end.







          share|improve this answer












          share|improve this answer



          share|improve this answer










          answered Mar 24 '12 at 17:07









          Matthew SlatteryMatthew Slattery

          35.5k382105




          35.5k382105

























              0














              to add some clarifications :



              shr AL, 1 ; it will (SH)ift (R)ight (1)x the value contained in AL register, which is 8 lower bits of AX register. Hence it will divide the value contained in AL by 2.



              If AL was previously even like 0b100 (4) it will become 0b10 (2) and put 0 in the carry flag.
              Carry Flag is bit 0 in the flag register https://en.wikipedia.org/wiki/FLAGS_register



              If AL was previously an odd value like 0b101 (5) then it will become 0b10 (2) and put 1 in the flag register. Hence the carry flag will act like a remainder if you divide by 2.



              jnc bit_0 ; It will (J)ump to label 'bit_0' if (N)o (C)arry flag was set, i.e if the value was even (like 0b100 in the above example) before the shift.






              share|improve this answer






























                0














                to add some clarifications :



                shr AL, 1 ; it will (SH)ift (R)ight (1)x the value contained in AL register, which is 8 lower bits of AX register. Hence it will divide the value contained in AL by 2.



                If AL was previously even like 0b100 (4) it will become 0b10 (2) and put 0 in the carry flag.
                Carry Flag is bit 0 in the flag register https://en.wikipedia.org/wiki/FLAGS_register



                If AL was previously an odd value like 0b101 (5) then it will become 0b10 (2) and put 1 in the flag register. Hence the carry flag will act like a remainder if you divide by 2.



                jnc bit_0 ; It will (J)ump to label 'bit_0' if (N)o (C)arry flag was set, i.e if the value was even (like 0b100 in the above example) before the shift.






                share|improve this answer




























                  0












                  0








                  0







                  to add some clarifications :



                  shr AL, 1 ; it will (SH)ift (R)ight (1)x the value contained in AL register, which is 8 lower bits of AX register. Hence it will divide the value contained in AL by 2.



                  If AL was previously even like 0b100 (4) it will become 0b10 (2) and put 0 in the carry flag.
                  Carry Flag is bit 0 in the flag register https://en.wikipedia.org/wiki/FLAGS_register



                  If AL was previously an odd value like 0b101 (5) then it will become 0b10 (2) and put 1 in the flag register. Hence the carry flag will act like a remainder if you divide by 2.



                  jnc bit_0 ; It will (J)ump to label 'bit_0' if (N)o (C)arry flag was set, i.e if the value was even (like 0b100 in the above example) before the shift.






                  share|improve this answer















                  to add some clarifications :



                  shr AL, 1 ; it will (SH)ift (R)ight (1)x the value contained in AL register, which is 8 lower bits of AX register. Hence it will divide the value contained in AL by 2.



                  If AL was previously even like 0b100 (4) it will become 0b10 (2) and put 0 in the carry flag.
                  Carry Flag is bit 0 in the flag register https://en.wikipedia.org/wiki/FLAGS_register



                  If AL was previously an odd value like 0b101 (5) then it will become 0b10 (2) and put 1 in the flag register. Hence the carry flag will act like a remainder if you divide by 2.



                  jnc bit_0 ; It will (J)ump to label 'bit_0' if (N)o (C)arry flag was set, i.e if the value was even (like 0b100 in the above example) before the shift.







                  share|improve this answer














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                  edited Nov 13 '18 at 14:24









                  Mustafa Enes Batur

                  54




                  54










                  answered Jan 23 '18 at 11:43









                  Antonin GAVRELAntonin GAVREL

                  567621




                  567621






























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