How to Implement a 4*3 signed binary multiplier using structural VHDL?
up vote
-1
down vote
favorite
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity multiply4x3 is
port(
a: in std_logic_vector (3 downto 0);
b: in std_logic_vector (2 downto 0);
c: out std_logic_vector (6 downto 0)
);
end entity multiply4x3;
architecture structural of multiply4x3 is
begin
c <= a*b;
end;
end architecture;
is what I tried, but it gives me 3 errors.
No feasible entries for infix operator '*'.
Type error resolving infix expression "*" as type ieee.std_logic_1164.STD_LOGIC_VECTOR.
VHDL Compiler exiting.
binary vhdl cpu-architecture modelsim
asked Nov 12 at 2:18
Tito
11
add a comment |
up vote
-1
down vote
favorite
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity multiply4x3 is
port(
a: in std_logic_vector (3 downto 0);
b: in std_logic_vector (2 downto 0);
c: out std_logic_vector (6 downto 0)
);
end entity multiply4x3;
architecture structural of multiply4x3 is
begin
c <= a*b;
end;
end architecture;
is what I tried, but it gives me 3 errors.
No feasible entries for infix operator '*'.
Type error resolving infix expression "*" as type ieee.std_logic_1164.STD_LOGIC_VECTOR.
VHDL Compiler exiting.
binary vhdl cpu-architecture modelsim
asked Nov 12 at 2:18
Tito
11
Your code doesn't replicate your error, there's an extraend;prior toend architecture;, a syntax errror. The meaning of a name (here "*" a function for overloading the multiplying operator is dependent on overload resolution, using the types of the parameters and return value. Your context clause does not making a compatible function declaration visible. You can used type conversions to convert to signed and std_logic_vector: ` c <= std_logic_vector(signed(a) * signed (b));` or make you entity ports type signed or provide a function declaration/specification that does.
– user1155120
Nov 12 at 2:59
Possible duplicate of A multiplication of a binary 5 bit number by 2 in VHDL
– user1155120
Nov 12 at 2:59
add a comment |
up vote
-1
down vote
favorite
up vote
-1
down vote
favorite
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity multiply4x3 is
port(
a: in std_logic_vector (3 downto 0);
b: in std_logic_vector (2 downto 0);
c: out std_logic_vector (6 downto 0)
);
end entity multiply4x3;
architecture structural of multiply4x3 is
begin
c <= a*b;
end;
end architecture;
is what I tried, but it gives me 3 errors.
No feasible entries for infix operator '*'.
Type error resolving infix expression "*" as type ieee.std_logic_1164.STD_LOGIC_VECTOR.
VHDL Compiler exiting.
binary vhdl cpu-architecture modelsim
asked Nov 12 at 2:18
Tito
11
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity multiply4x3 is
port(
a: in std_logic_vector (3 downto 0);
b: in std_logic_vector (2 downto 0);
c: out std_logic_vector (6 downto 0)
);
end entity multiply4x3;
architecture structural of multiply4x3 is
begin
c <= a*b;
end;
end architecture;
is what I tried, but it gives me 3 errors.
No feasible entries for infix operator '*'.
Type error resolving infix expression "*" as type ieee.std_logic_1164.STD_LOGIC_VECTOR.
VHDL Compiler exiting.
binary vhdl cpu-architecture modelsim
binary vhdl cpu-architecture modelsim
asked Nov 12 at 2:18
Tito
11
asked Nov 12 at 2:18
Tito
11
asked Nov 12 at 2:18
Tito
11
asked Nov 12 at 2:18
Tito
11
asked Nov 12 at 2:18
Tito
11
11
Your code doesn't replicate your error, there's an extraend;prior toend architecture;, a syntax errror. The meaning of a name (here "*" a function for overloading the multiplying operator is dependent on overload resolution, using the types of the parameters and return value. Your context clause does not making a compatible function declaration visible. You can used type conversions to convert to signed and std_logic_vector: ` c <= std_logic_vector(signed(a) * signed (b));` or make you entity ports type signed or provide a function declaration/specification that does.
– user1155120
Nov 12 at 2:59
Possible duplicate of A multiplication of a binary 5 bit number by 2 in VHDL
– user1155120
Nov 12 at 2:59
add a comment |
Your code doesn't replicate your error, there's an extraend;prior toend architecture;, a syntax errror. The meaning of a name (here "*" a function for overloading the multiplying operator is dependent on overload resolution, using the types of the parameters and return value. Your context clause does not making a compatible function declaration visible. You can used type conversions to convert to signed and std_logic_vector: ` c <= std_logic_vector(signed(a) * signed (b));` or make you entity ports type signed or provide a function declaration/specification that does.
– user1155120
Nov 12 at 2:59
Possible duplicate of A multiplication of a binary 5 bit number by 2 in VHDL
– user1155120
Nov 12 at 2:59
Your code doesn't replicate your error, there's an extra
end; prior to end architecture;, a syntax errror. The meaning of a name (here "*" a function for overloading the multiplying operator is dependent on overload resolution, using the types of the parameters and return value. Your context clause does not making a compatible function declaration visible. You can used type conversions to convert to signed and std_logic_vector: ` c <= std_logic_vector(signed(a) * signed (b));` or make you entity ports type signed or provide a function declaration/specification that does.– user1155120
Nov 12 at 2:59
Your code doesn't replicate your error, there's an extra
end; prior to end architecture;, a syntax errror. The meaning of a name (here "*" a function for overloading the multiplying operator is dependent on overload resolution, using the types of the parameters and return value. Your context clause does not making a compatible function declaration visible. You can used type conversions to convert to signed and std_logic_vector: ` c <= std_logic_vector(signed(a) * signed (b));` or make you entity ports type signed or provide a function declaration/specification that does.– user1155120
Nov 12 at 2:59
Possible duplicate of A multiplication of a binary 5 bit number by 2 in VHDL
– user1155120
Nov 12 at 2:59
Possible duplicate of A multiplication of a binary 5 bit number by 2 in VHDL
– user1155120
Nov 12 at 2:59
add a comment |
active
oldest
votes
Your Answer
StackExchange.ifUsing("editor", function () {
StackExchange.using("externalEditor", function () {
StackExchange.using("snippets", function () {
StackExchange.snippets.init();
});
});
}, "code-snippets");
StackExchange.ready(function() {
var channelOptions = {
tags: "".split(" "),
id: "1"
};
initTagRenderer("".split(" "), "".split(" "), channelOptions);
StackExchange.using("externalEditor", function() {
// Have to fire editor after snippets, if snippets enabled
if (StackExchange.settings.snippets.snippetsEnabled) {
StackExchange.using("snippets", function() {
createEditor();
});
}
else {
createEditor();
}
});
function createEditor() {
StackExchange.prepareEditor({
heartbeatType: 'answer',
convertImagesToLinks: true,
noModals: true,
showLowRepImageUploadWarning: true,
reputationToPostImages: 10,
bindNavPrevention: true,
postfix: "",
imageUploader: {
brandingHtml: "Powered by u003ca class="icon-imgur-white" href="https://imgur.com/"u003eu003c/au003e",
contentPolicyHtml: "User contributions licensed under u003ca href="https://creativecommons.org/licenses/by-sa/3.0/"u003ecc by-sa 3.0 with attribution requiredu003c/au003e u003ca href="https://stackoverflow.com/legal/content-policy"u003e(content policy)u003c/au003e",
allowUrls: true
},
onDemand: true,
discardSelector: ".discard-answer"
,immediatelyShowMarkdownHelp:true
});
}
});
draft saved
draft discarded
Sign up or log in
StackExchange.ready(function () {
StackExchange.helpers.onClickDraftSave('#login-link');
});
Sign up using Google
Sign up using Facebook
Sign up using Email and Password
Post as a guest
Required, but never shown
StackExchange.ready(
function () {
StackExchange.openid.initPostLogin('.new-post-login', 'https%3a%2f%2fstackoverflow.com%2fquestions%2f53255231%2fhow-to-implement-a-43-signed-binary-multiplier-using-structural-vhdl%23new-answer', 'question_page');
}
);
Post as a guest
Required, but never shown
active
oldest
votes
active
oldest
votes
active
oldest
votes
active
oldest
votes
draft saved
draft discarded
Thanks for contributing an answer to Stack Overflow!
- Please be sure to answer the question. Provide details and share your research!
But avoid …
- Asking for help, clarification, or responding to other answers.
- Making statements based on opinion; back them up with references or personal experience.
To learn more, see our tips on writing great answers.
Some of your past answers have not been well-received, and you're in danger of being blocked from answering.
Please pay close attention to the following guidance:
- Please be sure to answer the question. Provide details and share your research!
But avoid …
- Asking for help, clarification, or responding to other answers.
- Making statements based on opinion; back them up with references or personal experience.
To learn more, see our tips on writing great answers.
draft saved
draft discarded
Sign up or log in
StackExchange.ready(function () {
StackExchange.helpers.onClickDraftSave('#login-link');
});
Sign up using Google
Sign up using Facebook
Sign up using Email and Password
Post as a guest
Required, but never shown
StackExchange.ready(
function () {
StackExchange.openid.initPostLogin('.new-post-login', 'https%3a%2f%2fstackoverflow.com%2fquestions%2f53255231%2fhow-to-implement-a-43-signed-binary-multiplier-using-structural-vhdl%23new-answer', 'question_page');
}
);
Post as a guest
Required, but never shown
Sign up or log in
StackExchange.ready(function () {
StackExchange.helpers.onClickDraftSave('#login-link');
});
Sign up using Google
Sign up using Facebook
Sign up using Email and Password
Post as a guest
Required, but never shown
Sign up or log in
StackExchange.ready(function () {
StackExchange.helpers.onClickDraftSave('#login-link');
});
Sign up using Google
Sign up using Facebook
Sign up using Email and Password
Post as a guest
Required, but never shown
Sign up or log in
StackExchange.ready(function () {
StackExchange.helpers.onClickDraftSave('#login-link');
});
Sign up using Google
Sign up using Facebook
Sign up using Email and Password
Sign up using Google
Sign up using Facebook
Sign up using Email and Password
Post as a guest
Required, but never shown
Required, but never shown
Required, but never shown
Required, but never shown
Required, but never shown
Required, but never shown
Required, but never shown
Required, but never shown
Required, but never shown
Your code doesn't replicate your error, there's an extra
end;prior toend architecture;, a syntax errror. The meaning of a name (here "*" a function for overloading the multiplying operator is dependent on overload resolution, using the types of the parameters and return value. Your context clause does not making a compatible function declaration visible. You can used type conversions to convert to signed and std_logic_vector: ` c <= std_logic_vector(signed(a) * signed (b));` or make you entity ports type signed or provide a function declaration/specification that does.– user1155120
Nov 12 at 2:59
Possible duplicate of A multiplication of a binary 5 bit number by 2 in VHDL
– user1155120
Nov 12 at 2:59